Easyi3C is a leading supplier of embedded system tools that simplify the development and debugging of various communication protocols. The company offers a range of products designed to help engineers and developers use I3C/I2C , USB and MIPI, JEDEC, MCTP and other protocols more efficiently.

Based on the Tower I3C Host Adapter Pro+ test chip RDSON (2)

3. Based on the Tower I3C Host Adapter Pro+ test chip RDSON UP 

The following tests are based on a DDR5 hub chip with address 0x51. You can also make corresponding modifications based on your own test chip.

The testing steps are as follows:

1) Connect the Tower I3C Host Adapter Pro+ to the I3C target chip to be tested, and set up the test platform as shown in the diagram below:

First, connect the Easyi3C Host I3C/I2C adapter to your computer using a USB Type-C cable, install the necessary USB drivers, and then connect it to the target using the cable provided by the manufacturer.

2) From Official website Download the corresponding software package, Easyi3C Tower I3C Host Adapter (Pro+) API . Refer to the Easyi3C Tower I3C Host Adapter (Pro+) User Manual for package installation. Afterwards, you can use the API: ez_debug_i3c_write_read() to test. The test code is as follows:

# ==========================================================================
# --------------------------------------------------------------------------
# Copyright © 2026 by Easyi3C, Inc.
# All rights reserved.
# --------------------------------------------------------------------------
# ==========================================================================

import sys

from ezi3c.api import *
from ezi3c.api_debug import *

# Notes: You must make modifications based on your actual salve address
slave_addr = 0x51

ez = ez_open()
if not ez:
    print("Cannot open Adapter")
    sys.exit(-1)

try:
    version = ez_get_version(ez)
    print("version:{:08X}".format(version))

    ret = ez_set_io_voltage(ez, 1.0)
    assert ret == 0

    print("> SETAASA ...")
    ez_ccc_setaasa(ez)

    print("> i3c debug change timing parameter ...")
    ret = ez_debug_get_bus_pp_clk_freq(ez)
    print("> i3c Default PP freq: {}".format(ret))
    ret = ez_debug_set_bus_pp_clk_freq(ez, clk_khz=4000, clk_duty=50, tSU_DAT=20)
    ret = ez_debug_get_bus_pp_clk_freq(ez)
    print("> i3c Cur PP freq: {}".format(ret))

    print("> i3c read ...")
    ret, data = ez_i3c_write_read(ez, slave_addr, 0x0, 1)

    print("> i3c debug read ...")
    ret, data = ez_debug_i3c_write_read(ez, slave_addr, 0x0, 1, last_read_byte_read_bit=1)

finally:
    ez_close(ez)

In the code above, when we read from the I3C, we stop at bit 1 when the target device drives the bus. At this point, the SDA and SCL levels are both high, as shown in the waveform below:

3) Switch the circuit on the bus, similar to the diagram below. A 100-ohm resistor, as shown in the diagram, has been added to the bus:

4) Use the following formula: 100/(100 + RDSON_UP) * VIO = Voltage of SDA.

Then the RDSON UP of SDA can be calculated.

5) Using the same method as above, RDSON UP on the SCL bus can also be calculated.

In I3C system design, when selecting switches or multiplexers, the impact of Rds(on) on the signal must be considered: a low value can reduce voltage drop and power consumption, but the load effect of the on-capacitance (e.g., 1.5pF–15pF) on high-speed signals must be balanced; if "up" refers to "rising" or "maximum value," it may indicate the upper limit of Rds(on) . It is recommended to refer to the specific device's datasheet for accurate parameters.