Blog
Technology Sharing
I3C Host adapter Pro+ (4)hits:0


Easyi3C is a leading supplier of embedded system tools that simplify the development and debugging of various communication protocols. The company offers a range of products designed to help engineers and developers use I3C/I2C , USB and MIPI, JEDEC, MCTP and other protocols more efficiently.



4. I3C bus filter test:

edit

As shown in the MIPI protocol above, the tSP in the red circle is the pulse width ( tSP : time of spike suppression) that can be inserted into the bus. Our Tower console GUI supports the insertion of tSP, and you can specify the location and

Pulse width (ns) can be used to test whether the filter is working, thereby verifying the effectiveness of the filter.

The I3C filter test consists of two parts, one is the OD (Open Drain) part, and the other is the PP (Push Pull) part:

Tower Console can be set to insert tSP on SDA or SCL, and you can also choose the insertion position and pulse width. Due to hardware limitations, the minimum tSP width we can insert is 5ns.

1. OD fiter test:

 As shown below, enter the settings page:

edit

As shown in the figure above, when Register Read is done, insert 50ns tSP in the address part of SCL in the OD stage, click the Preview button, and you can preview the waveform. As shown below:

edit

The red circle part is the tSP to be inserted.

Then click the Read Reg button, and the waveform will appear on the oscilloscope, as shown below:

edit

The green circle is the tSP inserted into the SCL OD part. We can see that the waveform shows a read failure, and our log also gets the same result, as shown below:

edit

It can be seen that inserting such a wide tSP in the OD part will cause read and write errors, and the filter cannot filter it out. You can modify the tSP with different widths for testing according to the actual situation. In the same way, you can also insert different tSPs on SDA for testing.

2. PP fiter test:

As shown below, enter the settings page:

edit

As shown in the figure above, when Register Read is done, insert 50ns tSP in the address part of SCL in the PP stage, click the Preview button, and you can preview the waveform. As shown below:

edit

The red circle part is the tSP to be inserted.

Then click the Read Reg button, and the waveform will appear on the oscilloscope, as shown below:

edit

The green circle is the tSP inserted into the SCL PP part. We can see that the waveform shows a read failure, and our log also gets the same result, as shown below:

edit

It can be seen that inserting such a wide tSP in the PP part will cause read and write errors, and the filter cannot filter it out. You can modify the tSP with different widths for testing according to the actual situation. In the same way, you can also insert different tSPs on SDA for testing.

By inserting tSP on the SDA and SCL buses in the OD and PP stages respectively, we can determine the validity of the filter parameters in the Spec of the modified chip and ensure the reliability of the chip.

Through the above two chapters, you should have a preliminary understanding of the innovative features of our products. It is through the simplicity and ease of use of Tower console that we can easily complete the verification of important parameters on the I3C bus, improving the work efficiency of engineers, so that they can invest their precious time in testing more important product functions. In the following chapters, we will continue to explain some new features of Pro+, so stay tuned.


Service Line:

Address:Silicon Valley
Email:support@easyi3c.com

Copyright © Easyi3C Co., LTD